diff options
| author |   Dave Gerlach <d-gerlach@ti.com> | 2015-02-27 19:10:26 -0600 |
|---|---|---|
| committer |   Tony Lindgren <tony@atomide.com> | 2015-03-06 09:12:56 -0800 |
| commit | 424e0f039bfa8a51fb5c5178b6ece8baa4996469 (patch) | |
| tree | 8f85bb2f70388aeb9de66bc8714aba7cae531eb4 /include/dt-bindings/pinctrl | |
| parent | ARM: dts: OMAP5: fix polling intervals for thermal zones (diff) | |
| download | linux-dev-424e0f039bfa8a51fb5c5178b6ece8baa4996469.tar.xz linux-dev-424e0f039bfa8a51fb5c5178b6ece8baa4996469.zip | |
ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding
According to AM335x TRM, Document spruh73l, Revised February 2015,
Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness.
Current users of the macro (i2c and mdio) are left unmodified as
SLEWCTRL_FAST was the macro used and actual desired state. Tested on
am335x-gp-evm with no difference in software performance seen.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/dt-bindings/pinctrl')
| -rw-r--r-- | include/dt-bindings/pinctrl/am33xx.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h index 2fbc804e1a45..226f77246a70 100644 --- a/include/dt-bindings/pinctrl/am33xx.h +++ b/include/dt-bindings/pinctrl/am33xx.h @@ -13,7 +13,8 @@ #define PULL_DISABLE (1 << 3) #define INPUT_EN (1 << 5) -#define SLEWCTRL_FAST (1 << 6) +#define SLEWCTRL_SLOW (1 << 6) +#define SLEWCTRL_FAST 0 /* update macro depending on INPUT_EN and PULL_ENA */ #undef PIN_OUTPUT |