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| author |   AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-07-20 12:28:16 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2022-08-31 18:16:45 -0700 |
| commit | 697b551e29b61a00eea46c4704220756587e13af (patch) | |
| tree | 6e900d1fbd7a962b5395becde6ec6ee75f3659bb /include/dt-bindings/reset | |
| parent | clk: mediatek: mt8195-infra_ao: Set pwrmcu clocks as critical (diff) | |
| download | linux-dev-697b551e29b61a00eea46c4704220756587e13af.tar.xz linux-dev-697b551e29b61a00eea46c4704220756587e13af.zip | |
dt-bindings: reset: mt8195: Add resets for USB/PCIe t-phy port 1
Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB
or PCI-Express PHY reset.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220720102817.237483-2-angelogioacchino.delregno@collabora.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings/reset')
| -rw-r--r-- | include/dt-bindings/reset/mt8195-resets.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h index 39d6bcce745b..24ab3631dcea 100644 --- a/include/dt-bindings/reset/mt8195-resets.h +++ b/include/dt-bindings/reset/mt8195-resets.h @@ -33,5 +33,6 @@ #define MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST 2 #define MT8195_INFRA_RST2_PCIE_P0_SWRST 3 #define MT8195_INFRA_RST2_PCIE_P1_SWRST 4 +#define MT8195_INFRA_RST2_USBSIF_P1_SWRST 5 #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */ |