aboutsummaryrefslogtreecommitdiffstats
path: root/include/dt-bindings/reset
diff options
context:
space:
mode:
authorSergio Paracuellos <sergio.paracuellos@gmail.com>2022-01-10 12:49:27 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-01-26 13:04:46 +0100
commitf383b0770612838e78986231710c0a3afee4db42 (patch)
tree4161fe6e8ea9f56fc620d0c0a2caea9a9df932a8 /include/dt-bindings/reset
parentstaging: unisys: visorinput: Use struct_size() helper in kzalloc() (diff)
downloadlinux-dev-f383b0770612838e78986231710c0a3afee4db42.tar.xz
linux-dev-f383b0770612838e78986231710c0a3afee4db42.zip
dt-bindings: reset: add dt binding header for Mediatek MT7621 resets
Add dt binding header for resets lines in Mediatek MT7621 SoCs. Acked-by: Rob Herring <robh@kernel.org> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20220110114930.1406665-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/dt-bindings/reset')
-rw-r--r--include/dt-bindings/reset/mt7621-reset.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/mt7621-reset.h b/include/dt-bindings/reset/mt7621-reset.h
new file mode 100644
index 000000000000..7572c6b41453
--- /dev/null
+++ b/include/dt-bindings/reset/mt7621-reset.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021 Sergio Paracuellos
+ * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+ */
+
+#ifndef DT_BINDING_MT7621_RESET_H
+#define DT_BINDING_MT7621_RESET_H
+
+#define MT7621_RST_SYS 0
+#define MT7621_RST_MCM 2
+#define MT7621_RST_HSDMA 5
+#define MT7621_RST_FE 6
+#define MT7621_RST_SPDIFTX 7
+#define MT7621_RST_TIMER 8
+#define MT7621_RST_INT 9
+#define MT7621_RST_MC 10
+#define MT7621_RST_PCM 11
+#define MT7621_RST_PIO 13
+#define MT7621_RST_GDMA 14
+#define MT7621_RST_NFI 15
+#define MT7621_RST_I2C 16
+#define MT7621_RST_I2S 17
+#define MT7621_RST_SPI 18
+#define MT7621_RST_UART1 19
+#define MT7621_RST_UART2 20
+#define MT7621_RST_UART3 21
+#define MT7621_RST_ETH 23
+#define MT7621_RST_PCIE0 24
+#define MT7621_RST_PCIE1 25
+#define MT7621_RST_PCIE2 26
+#define MT7621_RST_AUX_STCK 28
+#define MT7621_RST_CRYPTO 29
+#define MT7621_RST_SDXC 30
+#define MT7621_RST_PPE 31
+
+#endif /* DT_BINDING_MT7621_RESET_H */