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| author |   Olof Johansson <olof@lixom.net> | 2015-01-29 13:57:19 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-01-29 13:57:19 -0800 |
| commit | 1215c3e65a50cc9770c8a6a1d6689fdcb673c4cc (patch) | |
| tree | cb1d8e17e7e57d5f57125ef9ad6202853e221524 /include/dt-bindings | |
| parent | Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt (diff) | |
| parent | ARM: dts: Add DISP1 power domain for exynos5420 (diff) | |
| download | linux-dev-1215c3e65a50cc9770c8a6a1d6689fdcb673c4cc.tar.xz linux-dev-1215c3e65a50cc9770c8a6a1d6689fdcb673c4cc.zip | |
Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung 3rd DT updates for v3.20" from Kukjin Kim:
- add DISP1 power domain for support HDMI support on exynos5420/5422/5800
and the power domain node including FIMD1, MIXER and HDMI modules
(tested on exynos5420 Peach Pit and exynos5800 Peach Pi Chromebooks
and exynos5422 Odroid XU3 by Javier Martinez Canillas)
Note this is including a patch for adding clock IDs for the DISP1 power
domain with Mike and Sylwester's acks so that could be handled together
to avoid non-working.
* tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add DISP1 power domain for exynos5420
clk: exynos5420: Add IDs for clocks used in DISP1 power domain
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/exynos5420.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h index 8dc0913f1775..99da0d117a7d 100644 --- a/include/dt-bindings/clock/exynos5420.h +++ b/include/dt-bindings/clock/exynos5420.h @@ -204,6 +204,12 @@ #define CLK_MOUT_MAUDIO0 643 #define CLK_MOUT_USER_ACLK333 644 #define CLK_MOUT_SW_ACLK333 645 +#define CLK_MOUT_USER_ACLK200_DISP1 646 +#define CLK_MOUT_SW_ACLK200 647 +#define CLK_MOUT_USER_ACLK300_DISP1 648 +#define CLK_MOUT_SW_ACLK300 649 +#define CLK_MOUT_USER_ACLK400_DISP1 650 +#define CLK_MOUT_SW_ACLK400 651 /* divider clocks */ #define CLK_DOUT_PIXEL 768 |