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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-09-14 10:38:48 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-09-14 10:38:48 +0200
commit4b55dce8b0e5f1440aea1b43d55e0bd4c0476737 (patch)
treeded38f68b6ba46c836d57d1f644ed52ca4e5b2dc /include/dt-bindings
parentstaging: erofs: surround fault_injection ralted option parsing using CONFIG_EROFS_FAULT_INJECTION (diff)
parentiio: light: bh1750: simplify setting PM ops (diff)
downloadlinux-dev-4b55dce8b0e5f1440aea1b43d55e0bd4c0476737.tar.xz
linux-dev-4b55dce8b0e5f1440aea1b43d55e0bd4c0476737.zip
Merge tag 'iio-for-4.20a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes: 1st round of IIO new device support, features and cleanups in the 4.20 cycle. There is a merge commit in here to pull in regmap support for repeatedly reading the same register (to read out FIFOs). Used by the adxl372 driver. This will find uses elsewhere once we tidy up various drivers that are effectively doing this and relying on not enabling regcache. New device support * Analog devices ADXL372 accelerometer - new driver for this accelerometer including fifo and and interrupt support. Follow up patches enforce trigger validation, add sampling frequency control and filter bandwidth control. A later series added i2c support to the existing SPI support. * ST lsm6dsx - rework and add support fo the LSM6DSO 6 axis mems sensor. * Linear LTC 1660 DAC - new driver supporting the LTC 1660 and LTC 1665 SPI DACs. * Microchip mcp3911 ADC. - new driver for this integrated analog front end and ADC. * Qualcomm SPMI PMIC5 adc driver - using the spmi framework, new driver and bindings for this ADC. Follow up patch adds some missing channels. Features * ad5758 - support hard reset using a gpio (if provided). * mpu6050 - Regulator support * qcom-spmi-adc5 - Sanity check the channel numbers provided by DT to make sure the driver actually knows about them. * sc27xx - give raw data for channel 20 as it's used on all known boards for the headset which needs a custom converstion function. If it turns out someone builds a board where this isn't true we will deal with it when it happens. - add ADC scale calibration. * tsl2772 - support device tree binding to set the proximity led settings. - regulator supprot. - binding for apds9930 - trivial addition as register compatible with tsl2772. Cleanups / Minor fixes * adxl345 - supress a static checker warning but explicitly checking if the id object is null. * bh1750 - avoid CONFIG_PM_SLEEP checks. - SPDX. * bme680 - spelling mistake - use clamp rather than open coding. - white space and other similar fixes. - rename MSK to MASK for clarifty and use GENMASK to specify them. - use the FIELD_GET macro rather than a very odd accessor of dividing by 16 to get the shift. - rework to share handing for oversampling of the various channels in a unified way. - check explicitly for val2 in write_raw function to ensure it is 0. - drop some field defines that don't add anything. * dpot-adc - SPDX * envelope detector - SPDX * isl29501 - fix an ancient compiler warning mostly because it results in much nicer code. * max30102 - mark switch fall throughs. * max44000 - drop an unused variable. * max512 - avoid CONFIG_PM_SLEEP checks. * max5481 - use of_device_get_match_data rather than open coding it. * max5821 - avoid CONFIG_PM_SLEEP checks. * max9611 - explicity cast an enum to an integer to make it totally clear that this is intended. * mcp4018 - fix an inconsistent MODULE_LICENSE. - use of_device_get_match_data rather than open coding it. * mcp4531 - use of_device_get_match_data rather than open coding it. - SPDX * mcp4725 - avoid CONFIG_PM_SLEEP checks. * mcp4922 - Fix error handling and prevent writing a negative to when setting the output voltage. * ms5611 - drop deprecated compatible strings without manufacturer from being explicitly listed. They are handled anyway. - SPDX * multiplexer - SPDX * qcom-vadc - fix inconsistent documentation for reg. * ti-dac5571 - provide and of_match_table. * treewide - update Michael Hennerich's email address. - Use %pOFn rather than device_node.name. * documentation. - tidy up a wrong kernel version for the introduction of the position_relative ABI.
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/iio/qcom,spmi-vadc.h125
1 files changed, 115 insertions, 10 deletions
diff --git a/include/dt-bindings/iio/qcom,spmi-vadc.h b/include/dt-bindings/iio/qcom,spmi-vadc.h
index 42121fa238fa..61d556db1542 100644
--- a/include/dt-bindings/iio/qcom,spmi-vadc.h
+++ b/include/dt-bindings/iio/qcom,spmi-vadc.h
@@ -1,14 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * Copyright (c) 2012-2014,2018 The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
@@ -116,4 +108,117 @@
#define VADC_LR_MUX10_PU1_PU2_AMUX_USB_ID 0xf9
#define VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM 0xfc
+/* ADC channels for SPMI PMIC5 */
+
+#define ADC5_REF_GND 0x00
+#define ADC5_1P25VREF 0x01
+#define ADC5_VREF_VADC 0x02
+#define ADC5_VREF_VADC5_DIV_3 0x82
+#define ADC5_VPH_PWR 0x83
+#define ADC5_VBAT_SNS 0x84
+#define ADC5_VCOIN 0x85
+#define ADC5_DIE_TEMP 0x06
+#define ADC5_USB_IN_I 0x07
+#define ADC5_USB_IN_V_16 0x08
+#define ADC5_CHG_TEMP 0x09
+#define ADC5_BAT_THERM 0x0a
+#define ADC5_BAT_ID 0x0b
+#define ADC5_XO_THERM 0x0c
+#define ADC5_AMUX_THM1 0x0d
+#define ADC5_AMUX_THM2 0x0e
+#define ADC5_AMUX_THM3 0x0f
+#define ADC5_AMUX_THM4 0x10
+#define ADC5_AMUX_THM5 0x11
+#define ADC5_GPIO1 0x12
+#define ADC5_GPIO2 0x13
+#define ADC5_GPIO3 0x14
+#define ADC5_GPIO4 0x15
+#define ADC5_GPIO5 0x16
+#define ADC5_GPIO6 0x17
+#define ADC5_GPIO7 0x18
+#define ADC5_SBUx 0x99
+#define ADC5_MID_CHG_DIV6 0x1e
+#define ADC5_OFF 0xff
+
+/* 30k pull-up1 */
+#define ADC5_BAT_THERM_30K_PU 0x2a
+#define ADC5_BAT_ID_30K_PU 0x2b
+#define ADC5_XO_THERM_30K_PU 0x2c
+#define ADC5_AMUX_THM1_30K_PU 0x2d
+#define ADC5_AMUX_THM2_30K_PU 0x2e
+#define ADC5_AMUX_THM3_30K_PU 0x2f
+#define ADC5_AMUX_THM4_30K_PU 0x30
+#define ADC5_AMUX_THM5_30K_PU 0x31
+#define ADC5_GPIO1_30K_PU 0x32
+#define ADC5_GPIO2_30K_PU 0x33
+#define ADC5_GPIO3_30K_PU 0x34
+#define ADC5_GPIO4_30K_PU 0x35
+#define ADC5_GPIO5_30K_PU 0x36
+#define ADC5_GPIO6_30K_PU 0x37
+#define ADC5_GPIO7_30K_PU 0x38
+#define ADC5_SBUx_30K_PU 0x39
+
+/* 100k pull-up2 */
+#define ADC5_BAT_THERM_100K_PU 0x4a
+#define ADC5_BAT_ID_100K_PU 0x4b
+#define ADC5_XO_THERM_100K_PU 0x4c
+#define ADC5_AMUX_THM1_100K_PU 0x4d
+#define ADC5_AMUX_THM2_100K_PU 0x4e
+#define ADC5_AMUX_THM3_100K_PU 0x4f
+#define ADC5_AMUX_THM4_100K_PU 0x50
+#define ADC5_AMUX_THM5_100K_PU 0x51
+#define ADC5_GPIO1_100K_PU 0x52
+#define ADC5_GPIO2_100K_PU 0x53
+#define ADC5_GPIO3_100K_PU 0x54
+#define ADC5_GPIO4_100K_PU 0x55
+#define ADC5_GPIO5_100K_PU 0x56
+#define ADC5_GPIO6_100K_PU 0x57
+#define ADC5_GPIO7_100K_PU 0x58
+#define ADC5_SBUx_100K_PU 0x59
+
+/* 400k pull-up3 */
+#define ADC5_BAT_THERM_400K_PU 0x6a
+#define ADC5_BAT_ID_400K_PU 0x6b
+#define ADC5_XO_THERM_400K_PU 0x6c
+#define ADC5_AMUX_THM1_400K_PU 0x6d
+#define ADC5_AMUX_THM2_400K_PU 0x6e
+#define ADC5_AMUX_THM3_400K_PU 0x6f
+#define ADC5_AMUX_THM4_400K_PU 0x70
+#define ADC5_AMUX_THM5_400K_PU 0x71
+#define ADC5_GPIO1_400K_PU 0x72
+#define ADC5_GPIO2_400K_PU 0x73
+#define ADC5_GPIO3_400K_PU 0x74
+#define ADC5_GPIO4_400K_PU 0x75
+#define ADC5_GPIO5_400K_PU 0x76
+#define ADC5_GPIO6_400K_PU 0x77
+#define ADC5_GPIO7_400K_PU 0x78
+#define ADC5_SBUx_400K_PU 0x79
+
+/* 1/3 Divider */
+#define ADC5_GPIO1_DIV3 0x92
+#define ADC5_GPIO2_DIV3 0x93
+#define ADC5_GPIO3_DIV3 0x94
+#define ADC5_GPIO4_DIV3 0x95
+#define ADC5_GPIO5_DIV3 0x96
+#define ADC5_GPIO6_DIV3 0x97
+#define ADC5_GPIO7_DIV3 0x98
+#define ADC5_SBUx_DIV3 0x99
+
+/* Current and combined current/voltage channels */
+#define ADC5_INT_EXT_ISENSE 0xa1
+#define ADC5_PARALLEL_ISENSE 0xa5
+#define ADC5_CUR_REPLICA_VDS 0xa7
+#define ADC5_CUR_SENS_BATFET_VDS_OFFSET 0xa9
+#define ADC5_CUR_SENS_REPLICA_VDS_OFFSET 0xab
+#define ADC5_EXT_SENS_OFFSET 0xad
+
+#define ADC5_INT_EXT_ISENSE_VBAT_VDATA 0xb0
+#define ADC5_INT_EXT_ISENSE_VBAT_IDATA 0xb1
+#define ADC5_EXT_ISENSE_VBAT_VDATA 0xb2
+#define ADC5_EXT_ISENSE_VBAT_IDATA 0xb3
+#define ADC5_PARALLEL_ISENSE_VBAT_VDATA 0xb4
+#define ADC5_PARALLEL_ISENSE_VBAT_IDATA 0xb5
+
+#define ADC5_MAX_CHANNEL 0xc0
+
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */