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authorMaxime COQUELIN <maxime.coquelin@st.com>2015-01-09 16:11:00 +0100
committerMaxime Coquelin <maxime.coquelin@st.com>2015-01-16 11:57:48 +0100
commit63f3171d5e5c6f826f8be4dcfa943212cb119eaf (patch)
treec402cdbdc05adac2846be43fb9c3bb60a9df671f /include/dt-bindings
parentARM: DT: STiH410: Add DRM dt nodes (diff)
downloadlinux-dev-63f3171d5e5c6f826f8be4dcfa943212cb119eaf.tar.xz
linux-dev-63f3171d5e5c6f826f8be4dcfa943212cb119eaf.zip
ARM: dts: Add STiH418 SoC support
The STiH418 is advanced UHD 60fps AVC processor with 3D graphic acceleration and quad-core ARM Cortex A9 CPU. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/stih418-clks.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/stih418-clks.h b/include/dt-bindings/clock/stih418-clks.h
new file mode 100644
index 000000000000..b62aa0b20217
--- /dev/null
+++ b/include/dt-bindings/clock/stih418-clks.h
@@ -0,0 +1,34 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH418 SoC.
+ */
+#ifndef _DT_BINDINGS_CLK_STIH418
+#define _DT_BINDINGS_CLK_STIH418
+
+#include "stih410-clks.h"
+
+/* STiH418 introduces new clock outputs compared to STiH410 */
+
+/* CLOCKGEN C0 */
+#define CLK_PROC_BDISP_0 14
+#define CLK_PROC_BDISP_1 15
+#define CLK_TX_ICN_1 23
+#define CLK_ETH_PHYREF 27
+#define CLK_PP_HEVC 35
+#define CLK_CLUST_HEVC 36
+#define CLK_HWPE_HEVC 37
+#define CLK_FC_HEVC 38
+#define CLK_PROC_MIXER 39
+#define CLK_PROC_SC 40
+#define CLK_AVSP_HEVC 41
+
+/* CLOCKGEN D2 */
+#undef CLK_PIX_PIP
+#undef CLK_PIX_GDP1
+#undef CLK_PIX_GDP2
+#undef CLK_PIX_GDP3
+#undef CLK_PIX_GDP4
+
+#define CLK_TMDS_HDMI_DIV2 5
+#define CLK_VP9 47
+#endif