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authorAnson Huang <anson.huang@nxp.com>2018-11-30 06:31:40 +0000
committerStephen Boyd <sboyd@kernel.org>2018-12-10 11:34:50 -0800
commit929914946fa615889d176568b175984e5128e0a3 (patch)
tree9625f891df449a70ff7cecfa785333234cb2f016 /include/dt-bindings
parentclk: imx6sl: ensure MMDC CH0 handshake is bypassed (diff)
downloadlinux-dev-929914946fa615889d176568b175984e5128e0a3.tar.xz
linux-dev-929914946fa615889d176568b175984e5128e0a3.zip
clk: imx6q: add DCICx clocks gate
On i.MX6QP/i.MX6Q/i.MX6DL, there are DCIC1/DCIC2 clocks gate in CCM_CCGR0 register, add them into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/imx6qdl-clock.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index 87b068f4a998..b3cef297d5df 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -274,6 +274,8 @@
#define IMX6QDL_CLK_EPIT1 261
#define IMX6QDL_CLK_EPIT2 262
#define IMX6QDL_CLK_MMDC_P0_IPG 263
-#define IMX6QDL_CLK_END 264
+#define IMX6QDL_CLK_DCIC1 264
+#define IMX6QDL_CLK_DCIC2 265
+#define IMX6QDL_CLK_END 266
#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */