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| author |   Tony Lindgren <tony@atomide.com> | 2019-11-01 09:27:19 -0700 |
|---|---|---|
| committer |   Tero Kristo <t-kristo@ti.com> | 2020-01-20 09:43:44 +0200 |
| commit | 957ad44ff5f266d280aff6a92a6aa74698b016a5 (patch) | |
| tree | 8c5cf0c2f62e250b273824a7210424e306c220f4 /include/dt-bindings | |
| parent | clk: ti: omap5: Add missing AESS clock (diff) | |
| download | linux-dev-957ad44ff5f266d280aff6a92a6aa74698b016a5.tar.xz linux-dev-957ad44ff5f266d280aff6a92a6aa74698b016a5.zip | |
clk: ti: add clkctrl data dra7 sgx
This is similar to what we have for omap5 except the gpu_cm address is
different, the mux clocks have one more source option, and there's no
divider clock.
Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "gpu-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.
For accessing the GPU, we also need to configure the interconnect target
module for GPU similar to what we have for omap5, I'll send that change
separately.
Cc: Benoit Parrot <bparrot@ti.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/dra7.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/dra7.h b/include/dt-bindings/clock/dra7.h index ff33f621b225..8cec5a1e1806 100644 --- a/include/dt-bindings/clock/dra7.h +++ b/include/dt-bindings/clock/dra7.h @@ -88,6 +88,9 @@ #define DRA7_DSS_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) #define DRA7_BB2D_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) +/* gpu clocks */ +#define DRA7_GPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) + /* l3init clocks */ #define DRA7_MMC1_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) #define DRA7_MMC2_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) |