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authorSean Wang <sean.wang@mediatek.com>2018-04-27 16:14:44 +0800
committerStephen Boyd <sboyd@kernel.org>2018-05-15 15:21:43 -0700
commitaa9bb8d19d53fae8c09a0a170175d8a60f99a6b3 (patch)
tree868702d9362caa83be1f6c2440c5547bcaea0c2d /include/dt-bindings
parentdt-bindings: clock: mediatek: add g3dsys bindings (diff)
downloadlinux-dev-aa9bb8d19d53fae8c09a0a170175d8a60f99a6b3.tar.xz
linux-dev-aa9bb8d19d53fae8c09a0a170175d8a60f99a6b3.zip
dt-bindings: clock: mediatek: add entry for Mali-450 node to refer
Just add binding for a required clock referenced by Mali-450 on MT7623 or MT2701 SoC. Cc: devicetree@vger.kernel.org Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/mt2701-clk.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h
index 24e93dfcee9f..2ac62a6e4574 100644
--- a/include/dt-bindings/clock/mt2701-clk.h
+++ b/include/dt-bindings/clock/mt2701-clk.h
@@ -431,6 +431,10 @@
#define CLK_ETHSYS_CRYPTO 8
#define CLK_ETHSYS_NR 9
+/* G3DSYS */
+#define CLK_G3DSYS_CORE 1
+#define CLK_G3DSYS_NR 2
+
/* BDP */
#define CLK_BDP_BRG_BA 1