diff options
| author |   周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2019-12-17 21:58:59 +0800 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2019-12-23 13:12:49 +0530 |
| commit | b98900548b8db965990691716c117b738eaa9d5a (patch) | |
| tree | c5b18ae324d2e56ff87e8e95a9c728743ffc46b2 /include/dt-bindings | |
| parent | dmaengine: fsl-edma: Add eDMA support for QorIQ LS1028A platform (diff) | |
| download | linux-dev-b98900548b8db965990691716c117b738eaa9d5a.tar.xz linux-dev-b98900548b8db965990691716c117b738eaa9d5a.zip | |
dt-bindings: dmaengine: Add X1830 bindings.
Add the dmaengine bindings for the X1830 Soc from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/1576591140-125668-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/dma/x1830-dma.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/dt-bindings/dma/x1830-dma.h b/include/dt-bindings/dma/x1830-dma.h new file mode 100644 index 000000000000..35bcb8966ea4 --- /dev/null +++ b/include/dt-bindings/dma/x1830-dma.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * This header provides macros for X1830 DMA bindings. + * + * Copyright (c) 2019 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> + */ + +#ifndef __DT_BINDINGS_DMA_X1830_DMA_H__ +#define __DT_BINDINGS_DMA_X1830_DMA_H__ + +/* + * Request type numbers for the X1830 DMA controller (written to the DRTn + * register for the channel). + */ +#define X1830_DMA_I2S0_TX 0x6 +#define X1830_DMA_I2S0_RX 0x7 +#define X1830_DMA_AUTO 0x8 +#define X1830_DMA_SADC_RX 0x9 +#define X1830_DMA_UART1_TX 0x12 +#define X1830_DMA_UART1_RX 0x13 +#define X1830_DMA_UART0_TX 0x14 +#define X1830_DMA_UART0_RX 0x15 +#define X1830_DMA_SSI0_TX 0x16 +#define X1830_DMA_SSI0_RX 0x17 +#define X1830_DMA_SSI1_TX 0x18 +#define X1830_DMA_SSI1_RX 0x19 +#define X1830_DMA_MSC0_TX 0x1a +#define X1830_DMA_MSC0_RX 0x1b +#define X1830_DMA_MSC1_TX 0x1c +#define X1830_DMA_MSC1_RX 0x1d +#define X1830_DMA_DMIC_RX 0x21 +#define X1830_DMA_SMB0_TX 0x24 +#define X1830_DMA_SMB0_RX 0x25 +#define X1830_DMA_SMB1_TX 0x26 +#define X1830_DMA_SMB1_RX 0x27 +#define X1830_DMA_DES_TX 0x2e +#define X1830_DMA_DES_RX 0x2f + +#endif /* __DT_BINDINGS_DMA_X1830_DMA_H__ */ |