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authorMarc Zyngier <maz@kernel.org>2021-03-15 21:56:47 +0000
committerMarc Zyngier <maz@kernel.org>2021-06-01 10:45:59 +0100
commitf6c3e24fb721dda247f6691c809d6e6c413f22c7 (patch)
tree00666e47954e63bf8423c1d5a248ddbe9eda9a87 /include/kvm
parentKVM: arm64: vgic: Be tolerant to the lack of maintenance interrupt masking (diff)
downloadlinux-dev-f6c3e24fb721dda247f6691c809d6e6c413f22c7.tar.xz
linux-dev-f6c3e24fb721dda247f6691c809d6e6c413f22c7.zip
KVM: arm64: vgic: Let an interrupt controller advertise lack of HW deactivation
The vGIC, as architected by ARM, allows a virtual interrupt to trigger the deactivation of a physical interrupt. This allows the following interrupt to be delivered without requiring an exit. However, some implementations have choosen not to implement this, meaning that we will need some unsavoury workarounds to deal with this. On detecting such a case, taint the kernel and spit a nastygram. We'll deal with this in later patches. Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'include/kvm')
-rw-r--r--include/kvm/arm_vgic.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index ec621180ef09..e45b26e8d479 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -72,6 +72,9 @@ struct vgic_global {
bool has_gicv4;
bool has_gicv4_1;
+ /* Pseudo GICv3 from outer space */
+ bool no_hw_deactivation;
+
/* GIC system register CPU interface */
struct static_key_false gicv3_cpuif;