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authorLudovic Desroches <ludovic.desroches@atmel.com>2016-02-22 15:18:55 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-03-07 16:11:14 -0800
commit2958ccee3690717f711431b546d7f194d8fa4f8b (patch)
tree38686fd3ebb38d0e357b3722c97106397afb09d4 /include/linux/atmel_serial.h
parenttty/serial: at91: restore dynamic driver binding (diff)
downloadlinux-dev-2958ccee3690717f711431b546d7f194d8fa4f8b.tar.xz
linux-dev-2958ccee3690717f711431b546d7f194d8fa4f8b.zip
tty/serial: at91: fix bad offset for UART timeout register
With SAMA5D2, the UART has hw timeout but the offset of the register to define this value is not the same as the one for USART. When using the new UART, the value of this register was 0 so we never get timeout irqs. It involves that when using DMA, we were stuck until the execution of the dma callback which happens when a buffer is full (so after receiving 2048 bytes). Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/atmel_serial.h')
-rw-r--r--include/linux/atmel_serial.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/atmel_serial.h b/include/linux/atmel_serial.h
index ee696d7e8a43..5a4d664af87a 100644
--- a/include/linux/atmel_serial.h
+++ b/include/linux/atmel_serial.h
@@ -119,7 +119,8 @@
#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
#define ATMEL_US_CD GENMASK(15, 0) /* Clock Divider */
-#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
+#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register for USART */
+#define ATMEL_UA_RTOR 0x28 /* Receiver Time-out Register for UART */
#define ATMEL_US_TO GENMASK(15, 0) /* Time-out Value */
#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */