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authorFlorian Fainelli <f.fainelli@gmail.com>2014-08-22 18:55:40 -0700
committerDavid S. Miller <davem@davemloft.net>2014-08-23 11:38:53 -0700
commit705314797b8b997554b7e9d0ea7b65a497356e53 (patch)
treed687efea56072223575739944125a7fc1ebae871 /include/linux/brcmphy.h
parentnet: phy: broadcom: extract all registers to brcmphy.h (diff)
downloadlinux-dev-705314797b8b997554b7e9d0ea7b65a497356e53.tar.xz
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net: phy: broadcom: move shadow 0x1C register accessors to brcmphy.h
The shadow register 0x1C is used both by the BCM54xxx PHYs and the BCM7xxx internal PHYs, move the accessors to a common location so both drivers can use them. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/brcmphy.h')
-rw-r--r--include/linux/brcmphy.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
index be31bf9f60c2..722cf26567fa 100644
--- a/include/linux/brcmphy.h
+++ b/include/linux/brcmphy.h
@@ -195,4 +195,24 @@
#define MII_BRCM_FET_SHDW_AUXSTAT2 0x1b /* Auxiliary status 2 */
#define MII_BRCM_FET_SHDW_AS2_APDE 0x0020 /* Auto power down enable */
+/*
+ * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T
+ * 0x1c shadow registers.
+ */
+static inline int bcm54xx_shadow_read(struct phy_device *phydev, u16 shadow)
+{
+ phy_write(phydev, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow));
+ return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD));
+}
+
+static inline int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow,
+ u16 val)
+{
+ return phy_write(phydev, MII_BCM54XX_SHD,
+ MII_BCM54XX_SHD_WRITE |
+ MII_BCM54XX_SHD_VAL(shadow) |
+ MII_BCM54XX_SHD_DATA(val));
+}
+
+
#endif /* _LINUX_BRCMPHY_H */