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authorThomas Gleixner <tglx@linutronix.de>2014-09-14 15:34:38 +0200
committerThomas Gleixner <tglx@linutronix.de>2014-09-14 15:35:36 +0200
commitdb985cbd67c45f875ef43cb5febfaa8cbd203c27 (patch)
tree63542d05b1c0f730ec1ad5f915dc4eb3c015e616 /include/linux/clocksource.h
parentRevert "irq: Warn when shared interrupts do not match on NO_SUSPEND" (diff)
parentMerge branch 'irqchip/handle_domain' into irqchip/core (diff)
Merge tag 'irqchip-core-3.18' of git://git.infradead.org/users/jcooper/linux into irq/core
irqchip core changes for v3.18 - renesas: suspend to RAM, runtime PM, cleanups and DT binding docs - keystone: add new driver - hip04: add Hisilicon HiP04 driver (without touching irq-gic.c) - gic: Use defines instead of magic number, preserve v2 bybass bits - handle_domain_irq: common low level interrupt entry handler
Diffstat (limited to 'include/linux/clocksource.h')
-rw-r--r--include/linux/clocksource.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index a16b497d5159..653f0e2b6ca9 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -162,7 +162,6 @@ extern u64 timecounter_cyc2time(struct timecounter *tc,
* @archdata: arch-specific data
* @suspend: suspend function for the clocksource, if necessary
* @resume: resume function for the clocksource, if necessary
- * @cycle_last: most recent cycle counter value seen by ::read()
* @owner: module reference, must be set by clocksource in modules
*/
struct clocksource {
@@ -171,7 +170,6 @@ struct clocksource {
* clocksource itself is cacheline aligned.
*/
cycle_t (*read)(struct clocksource *cs);
- cycle_t cycle_last;
cycle_t mask;
u32 mult;
u32 shift;