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| author |   James Clark <james.clark@arm.com> | 2022-05-11 15:45:58 +0100 |
|---|---|---|
| committer |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2022-07-06 16:32:08 +0100 |
| commit | 2d693ed436a67db06d1473c22d4caee899a4e9d2 (patch) | |
| tree | c45eab26e0306d9bae1b3d8ea9f0e26944cfda90 /include/linux/coresight-pmu.h | |
| parent | Documentation: coresight: Escape coresight bindings file wildcard (diff) | |
| download | linux-dev-2d693ed436a67db06d1473c22d4caee899a4e9d2.tar.xz linux-dev-2d693ed436a67db06d1473c22d4caee899a4e9d2.zip | |
coresight: Add config flag to enable branch broadcast
When enabled, all taken branch addresses are output, even if the branch
was because of a direct branch instruction. This enables reconstruction
of the program flow without having access to the memory image of the
code being executed.
Use bit 8 for the config option which would be the correct bit for
programming ETMv3. Although branch broadcast can't be enabled on ETMv3
because it's not in the define ETM3X_SUPPORTED_OPTIONS, using the
correct bit might help prevent future collisions or allow it to be
enabled if needed.
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20220511144601.2257870-2-james.clark@arm.com
Diffstat (limited to 'include/linux/coresight-pmu.h')
| -rw-r--r-- | include/linux/coresight-pmu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 4ac5c081af93..6c2fd6cc5a98 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -18,6 +18,7 @@ * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and * directly use below macros as config bits. */ +#define ETM_OPT_BRANCH_BROADCAST 8 #define ETM_OPT_CYCACC 12 #define ETM_OPT_CTXTID 14 #define ETM_OPT_CTXTID2 15 @@ -25,6 +26,7 @@ #define ETM_OPT_RETSTK 29 /* ETMv4 CONFIGR programming bits for the ETM OPTs */ +#define ETM4_CFG_BIT_BB 3 #define ETM4_CFG_BIT_CYCACC 4 #define ETM4_CFG_BIT_CTXTID 6 #define ETM4_CFG_BIT_VMID 7 |