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| author |   Mike Leach <mike.leach@linaro.org> | 2017-08-02 10:22:19 -0600 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-08-28 17:35:43 +0200 |
| commit | df770ff0586a494fabe68ffbe2898d7df5666663 (patch) | |
| tree | 4ad7e71b3ba91349f08111a3c2bb431d0277fd47 /include/linux/coresight-pmu.h | |
| parent | nvmem: include linux/err.h from header (diff) | |
| download | linux-dev-df770ff0586a494fabe68ffbe2898d7df5666663.tar.xz linux-dev-df770ff0586a494fabe68ffbe2898d7df5666663.zip | |
perf: cs-etm: Fix ETMv4 CONFIGR entry in perf.data file
The value passed into the perf.data file for the CONFIGR register in ETMv4
was incorrectly being set to the command line options/ETMv3 value.
Adds bit definitions and function to remap this value to the correct ETMv4
CONFIGR bit values for all selected options.
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/coresight-pmu.h')
| -rw-r--r-- | include/linux/coresight-pmu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 45852c2cd096..edfeaba95429 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -26,6 +26,11 @@ #define ETM_OPT_TS 28 #define ETM_OPT_RETSTK 29 +/* ETMv4 CONFIGR programming bits for the ETM OPTs */ +#define ETM4_CFG_BIT_CYCACC 4 +#define ETM4_CFG_BIT_TS 11 +#define ETM4_CFG_BIT_RETSTK 12 + static inline int coresight_get_trace_id(int cpu) { /* |