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authorMaxime Ripard <maxime.ripard@free-electrons.com>2015-07-06 12:19:23 +0200
committerVinod Koul <vinod.koul@intel.com>2015-08-06 08:30:56 +0530
commit50c7cd2bd3786258606c6c7c8356064c08ab2383 (patch)
treeb5854b21601f6cf912246f6ddd59a30c44836b2c /include/linux/dmaengine.h
parentdmaengine: Add an enum for the dmaengine alignment constraints (diff)
downloadlinux-dev-50c7cd2bd3786258606c6c7c8356064c08ab2383.tar.xz
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dmaengine: Add scatter-gathered memset
The current API allows the driver to accelerate memset by using the DMA controller. However, it does so over a contiguous memory area, which might proves inefficient when you have to do it over a non-contiguous yet repititive pattern, since you have to create a number of descriptors and then submit each other. Add a memset operation going over a scatter list to handle such cases in a single call. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include/linux/dmaengine.h')
-rw-r--r--include/linux/dmaengine.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 03ed832adbc2..8ad9a4e839f6 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -66,6 +66,7 @@ enum dma_transaction_type {
DMA_XOR_VAL,
DMA_PQ_VAL,
DMA_MEMSET,
+ DMA_MEMSET_SG,
DMA_INTERRUPT,
DMA_SG,
DMA_PRIVATE,
@@ -630,6 +631,7 @@ enum dmaengine_alignment {
* @device_prep_dma_pq: prepares a pq operation
* @device_prep_dma_pq_val: prepares a pqzero_sum operation
* @device_prep_dma_memset: prepares a memset operation
+ * @device_prep_dma_memset_sg: prepares a memset operation over a scatter list
* @device_prep_dma_interrupt: prepares an end of chain interrupt operation
* @device_prep_slave_sg: prepares a slave dma operation
* @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
@@ -696,6 +698,9 @@ struct dma_device {
struct dma_async_tx_descriptor *(*device_prep_dma_memset)(
struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
unsigned long flags);
+ struct dma_async_tx_descriptor *(*device_prep_dma_memset_sg)(
+ struct dma_chan *chan, struct scatterlist *sg,
+ unsigned int nents, int value, unsigned long flags);
struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
struct dma_chan *chan, unsigned long flags);
struct dma_async_tx_descriptor *(*device_prep_dma_sg)(