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| author |   Stefan Brüns <stefan.bruens@rwth-aachen.de> | 2017-09-12 01:44:45 +0200 |
|---|---|---|
| committer |   Vinod Koul <vinod.koul@intel.com> | 2017-09-21 22:34:28 +0530 |
| commit | c2cbd4276eea1d3b204754653dd74d6e10ca207f (patch) | |
| tree | abf3baa3f916affd4ec780c4ae46078ab532607e /include/linux/dmaengine.h | |
| parent | dmaengine: List all allowed values for src/dst_addr_width in kernel doc (diff) | |
| download | linux-dev-c2cbd4276eea1d3b204754653dd74d6e10ca207f.tar.xz linux-dev-c2cbd4276eea1d3b204754653dd74d6e10ca207f.zip | |
dmaengine: Mark struct dma_slave_caps kernel-doc correctly, clarify
struct dma_slave_caps documentation omitted the correct kernel-doc
opening comment mark.
Document byte granularity and interpretation of the src/dst_addr_widths
bit flag fields used by struct dma_slave_caps and struct dma_device.
Add punctuation to their "directions" member documentations, and cleanup
wording of the description.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include/linux/dmaengine.h')
| -rw-r--r-- | include/linux/dmaengine.h | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 2910e7dadc7f..f838764993eb 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -404,14 +404,16 @@ enum dma_residue_granularity { DMA_RESIDUE_GRANULARITY_BURST = 2, }; -/* struct dma_slave_caps - expose capabilities of a slave channel only - * - * @src_addr_widths: bit mask of src addr widths the channel supports - * @dst_addr_widths: bit mask of dstn addr widths the channel supports - * @directions: bit mask of slave direction the channel supported - * since the enum dma_transfer_direction is not defined as bits for each - * type of direction, the dma controller should fill (1 << <TYPE>) and same - * should be checked by controller as well +/** + * struct dma_slave_caps - expose capabilities of a slave channel only + * @src_addr_widths: bit mask of src addr widths the channel supports. + * Width is specified in bytes, e.g. for a channel supporting + * a width of 4 the mask should have BIT(4) set. + * @dst_addr_widths: bit mask of dst addr widths the channel supports + * @directions: bit mask of slave directions the channel supports. + * Since the enum dma_transfer_direction is not defined as bit flag for + * each type, the dma controller should set BIT(<TYPE>) and same + * should be checked by controller as well * @max_burst: max burst capability per-transfer * @cmd_pause: true, if pause and thereby resume is supported * @cmd_terminate: true, if terminate cmd is supported @@ -678,11 +680,13 @@ struct dma_filter { * @dev_id: unique device ID * @dev: struct device reference for dma mapping api * @src_addr_widths: bit mask of src addr widths the device supports + * Width is specified in bytes, e.g. for a device supporting + * a width of 4 the mask should have BIT(4) set. * @dst_addr_widths: bit mask of dst addr widths the device supports - * @directions: bit mask of slave direction the device supports since - * the enum dma_transfer_direction is not defined as bits for - * each type of direction, the dma controller should fill (1 << - * <TYPE>) and same should be checked by controller as well + * @directions: bit mask of slave directions the device supports. + * Since the enum dma_transfer_direction is not defined as bit flag for + * each type, the dma controller should set BIT(<TYPE>) and same + * should be checked by controller as well * @max_burst: max burst capability per-transfer * @residue_granularity: granularity of the transfer residue reported * by tx_status |