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authorAlan Tull <atull@opensource.altera.com>2017-03-23 19:34:27 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-04-08 17:45:28 +0200
commit42d5ec954719917e2b7a9160fe05d2316eece5bf (patch)
tree19088b3704312ff5f8f6b4e2790e3963ebb2d4da /include/linux/fpga
parentfpga manager: Add Xilinx slave serial SPI driver (diff)
downloadlinux-dev-42d5ec954719917e2b7a9160fe05d2316eece5bf.tar.xz
linux-dev-42d5ec954719917e2b7a9160fe05d2316eece5bf.zip
fpga: add config complete timeout
Adding timeout for maximum allowed time for FPGA to go to operating mode after a FPGA region has been programmed. Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/fpga')
-rw-r--r--include/linux/fpga/fpga-mgr.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index e2ef94fd37af..b4ac24c4411d 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -77,11 +77,14 @@ enum fpga_mgr_states {
* @flags: boolean flags as defined above
* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
+ * @config_complete_timeout_us: maximum time for FPGA to switch to operating
+ * status in the write_complete op.
*/
struct fpga_image_info {
u32 flags;
u32 enable_timeout_us;
u32 disable_timeout_us;
+ u32 config_complete_timeout_us;
};
/**