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authorTrent Piepho <tpiepho@freescale.com>2008-10-30 18:17:06 -0700
committerJeff Garzik <jgarzik@redhat.com>2008-10-31 00:59:46 -0400
commitc132419e560a2ecd3c8cf77f9c37e103e74b3754 (patch)
tree09f6753d9eb9b4fd06b0f7651414d6555ee2cccb /include/linux/fsl_devices.h
parentat91_ether: request/free GPIO for PHY interrupt (diff)
downloadlinux-dev-c132419e560a2ecd3c8cf77f9c37e103e74b3754.tar.xz
linux-dev-c132419e560a2ecd3c8cf77f9c37e103e74b3754.zip
gianfar: Fix race in TBI/SerDes configuration
The init_phy() function attaches to the PHY, then configures the SerDes<->TBI link (in SGMII mode). The TBI is on the MDIO bus with the PHY (sort of) and is accessed via the gianfar's MDIO registers, using the functions gfar_local_mdio_read/write(), which don't do any locking. The previously attached PHY will start a work-queue on a timer, and probably an irq handler as well, which will talk to the PHY and thus use the MDIO bus. This uses phy_read/write(), which have locking, but not against the gfar_local_mdio versions. The result is that PHY code will try to use the MDIO bus at the same time as the SerDes setup code, corrupting the transfers. Setting up the SerDes before attaching to the PHY will insure that there is no race between the SerDes code and *our* PHY, but doesn't fix everything. Typically the PHYs for all gianfar devices are on the same MDIO bus, which is associated with the first gianfar device. This means that the first gianfar's SerDes code could corrupt the MDIO transfers for a different gianfar's PHY. The lock used by phy_read/write() is contained in the mii_bus structure, which is pointed to by the PHY. This is difficult to access from the gianfar drivers, as there is no link between a gianfar device and the mii_bus which shares the same MDIO registers. As far as the device layer and drivers are concerned they are two unrelated devices (which happen to share registers). Generally all gianfar devices' PHYs will be on the bus associated with the first gianfar. But this might not be the case, so simply locking the gianfar's PHY's mii bus might not lock the mii bus that the SerDes setup code is going to use. We solve this by having the code that creates the gianfar platform device look in the device tree for an mdio device that shares the gianfar's registers. If one is found the ID of its platform device is saved in the gianfar's platform data. A new function in the gianfar mii code, gfar_get_miibus(), can use the bus ID to search through the platform devices for a gianfar_mdio device with the right ID. The platform device's driver data is the mii_bus structure, which the SerDes setup code can use to lock the current bus. Signed-off-by: Trent Piepho <tpiepho@freescale.com> CC: Andy Fleming <afleming@freescale.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'include/linux/fsl_devices.h')
-rw-r--r--include/linux/fsl_devices.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 4e625e0094c8..708bab58d8d0 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -49,7 +49,8 @@ struct gianfar_platform_data {
u32 device_flags;
/* board specific information */
u32 board_flags;
- char bus_id[MII_BUS_ID_SIZE];
+ int mdio_bus; /* Bus controlled by us */
+ char bus_id[MII_BUS_ID_SIZE]; /* Bus PHY is on */
u32 phy_id;
u8 mac_addr[6];
phy_interface_t interface;