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| author |   Chew, Chiau Ee <chiau.ee.chew@intel.com> | 2013-06-21 15:05:28 +0800 |
|---|---|---|
| committer |   Wolfram Sang <wsa@the-dreams.de> | 2013-08-07 16:58:07 +0200 |
| commit | 825642455367e5498da82a8044dd345ac7869c8d (patch) | |
| tree | 999b3a3e79b0b5cfb8059a54720127427bda4b7a /include/linux/i2c.h | |
| parent | i2c: pxa: enable high speed mode for i2c bus (diff) | |
| download | linux-dev-825642455367e5498da82a8044dd345ac7869c8d.tar.xz linux-dev-825642455367e5498da82a8044dd345ac7869c8d.zip | |
i2c: designware: Manually set RESTART bit between messages
If both IC_EMPTYFIFO_HOLD_MASTER_EN and IC_RESTART_EN are set to 1, the
Designware I2C controller doesn't generate RESTART unless user specifically
requests it by setting RESTART bit in IC_DATA_CMD register.
Since IC_EMPTYFIFO_HOLD_MASTER_EN setting can't be detected from hardware
register, we must always manually set the restart bit between messages.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'include/linux/i2c.h')
0 files changed, 0 insertions, 0 deletions