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| author |   Sohil Mehta <sohil.mehta@intel.com> | 2017-12-20 11:59:25 -0800 |
|---|---|---|
| committer |   Joerg Roedel <jroedel@suse.de> | 2018-01-17 15:02:50 +0100 |
| commit | 59103caa6839592788e7ad58b35863aac034631a (patch) | |
| tree | b645989c4381eb78047b628f04be37a602c08538 /include/linux/intel-iommu.h | |
| parent | iommu/vt-d: Enable upto 57 bits of domain address width (diff) | |
| download | linux-dev-59103caa6839592788e7ad58b35863aac034631a.tar.xz linux-dev-59103caa6839592788e7ad58b35863aac034631a.zip | |
iommu/vt-d: Add a check for 1GB page support
Add a check to verify IOMMU 1GB page support. If the CPU supports 1GB
pages but the IOMMU does not support it then disable SVM by not
allocating PASID tables.
Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/linux/intel-iommu.h')
| -rw-r--r-- | include/linux/intel-iommu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index f3274d9f46a2..a56bab114f39 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -84,6 +84,7 @@ * Decoding Capability Register */ #define cap_pi_support(c) (((c) >> 59) & 1) +#define cap_fl1gp_support(c) (((c) >> 56) & 1) #define cap_read_drain(c) (((c) >> 55) & 1) #define cap_write_drain(c) (((c) >> 54) & 1) #define cap_max_amask_val(c) (((c) >> 48) & 0x3f) |