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authorZhen Lei <thunder.leizhen@huawei.com>2018-09-20 17:10:22 +0100
committerWill Deacon <will.deacon@arm.com>2018-10-01 13:01:32 +0100
commit2da274cdf998a1c12afa6b5975db2df1df01edf1 (patch)
tree0edeb8424745e5f3f4a5e42d9df6aadd1c737c83 /include/linux/iommu.h
parentiommu/arm-smmu: Ensure that page-table updates are visible before TLBI (diff)
downloadlinux-dev-2da274cdf998a1c12afa6b5975db2df1df01edf1.tar.xz
linux-dev-2da274cdf998a1c12afa6b5975db2df1df01edf1.zip
iommu/dma: Add support for non-strict mode
With the flush queue infrastructure already abstracted into IOVA domains, hooking it up in iommu-dma is pretty simple. Since there is a degree of dependency on the IOMMU driver knowing what to do to play along, we key the whole thing off a domain attribute which will be set on default DMA ops domains to request non-strict invalidation. That way, drivers can indicate the appropriate support by acknowledging the attribute, and we can easily fall back to strict invalidation otherwise. The flush queue callback needs a handle on the iommu_domain which owns our cookie, so we have to add a pointer back to that, but neatly, that's also sufficient to indicate whether we're using a flush queue or not, and thus which way to release IOVAs. The only slight subtlety is switching __iommu_dma_unmap() from calling iommu_unmap() to explicit iommu_unmap_fast()/iommu_tlb_sync() so that we can elide the sync entirely in non-strict mode. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> [rm: convert to domain attribute, tweak comments and commit message] Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'include/linux/iommu.h')
-rw-r--r--include/linux/iommu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 87994c265bf5..decabe8e8dbe 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -124,6 +124,7 @@ enum iommu_attr {
DOMAIN_ATTR_FSL_PAMU_ENABLE,
DOMAIN_ATTR_FSL_PAMUV1,
DOMAIN_ATTR_NESTING, /* two stages of translation */
+ DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
DOMAIN_ATTR_MAX,
};