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| author |   Matt Roper <matthew.d.roper@intel.com> | 2022-02-17 17:03:27 -0800 |
|---|---|---|
| committer |   Lucas De Marchi <lucas.demarchi@intel.com> | 2022-02-18 16:03:31 -0800 |
| commit | 9b693453a4eba392bbb62169243f9513366a253e (patch) | |
| tree | b3da41c79c360d2bd06486398ae539f0c1f5b2f4 /include/linux/iosys-map.h | |
| parent | drm/i915: Fix for PHY_MISC_TC1 offset (diff) | |
| download | linux-dev-9b693453a4eba392bbb62169243f9513366a253e.tar.xz linux-dev-9b693453a4eba392bbb62169243f9513366a253e.zip | |
drm/i915/dg2: Drop 38.4 MHz MPLLB tables
Our early understanding of DG2 was incorrect; since the 5th display
isn't actually a Type-C output, 38.4 MHz input clocks are never used on
this platform and we can drop the corresponding MPLLB tables.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218010328.183423-2-lucas.demarchi@intel.com
Diffstat (limited to 'include/linux/iosys-map.h')
0 files changed, 0 insertions, 0 deletions