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| author |   Eric Auger <eric.auger@redhat.com> | 2017-05-04 11:19:52 +0200 |
|---|---|---|
| committer |   Christoffer Dall <cdall@linaro.org> | 2017-05-08 14:35:59 +0200 |
| commit | 44de9d683847ba6dbac290bb8c9f1b773cbda746 (patch) | |
| tree | bce1559ad4601adadc909f2b69e8f9c8a0c307e3 /include/linux/irqchip/arm-gic-v3.h | |
| parent | KVM: arm64: vgic-its: Check the device id matches TYPER DEVBITS range (diff) | |
| download | linux-dev-44de9d683847ba6dbac290bb8c9f1b773cbda746.tar.xz linux-dev-44de9d683847ba6dbac290bb8c9f1b773cbda746.zip | |
KVM: arm64: vgic-v3: vgic_v3_lpi_sync_pending_status
this new helper synchronizes the irq pending_latch
with the LPI pending bit status found in rdist pending table.
As the status is consumed, we reset the bit in pending table.
As we need the PENDBASER_ADDRESS() in vgic-v3, let's move its
definition in the irqchip header. We restore the full length
of the field, ie [51:16]. Same for PROPBASER_ADDRESS with full
field length of [51:12].
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'include/linux/irqchip/arm-gic-v3.h')
| -rw-r--r-- | include/linux/irqchip/arm-gic-v3.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index be8bad00c419..fffb91202bc9 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -159,6 +159,8 @@ #define GICR_PROPBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWaWb) #define GICR_PROPBASER_IDBITS_MASK (0x1f) +#define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12)) +#define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16)) #define GICR_PENDBASER_SHAREABILITY_SHIFT (10) #define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7) |