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| author |   Antoine Tenart <antoine.tenart@bootlin.com> | 2019-07-24 10:17:09 +0200 |
|---|---|---|
| committer |   Paul Burton <paul.burton@mips.com> | 2019-08-24 15:17:33 +0100 |
| commit | 048dc3abe82738567435d9caa106a20eb417b28a (patch) | |
| tree | 7d22e326eaf4ba1b728293f6ea9540286719b20f /include/linux/mfd/git:/ssh:/git@git.zx2c4.com | |
| parent | MIPS: lantiq: update the clock alias' for the mainline PCIe PHY driver (diff) | |
| download | linux-dev-048dc3abe82738567435d9caa106a20eb417b28a.tar.xz linux-dev-048dc3abe82738567435d9caa106a20eb417b28a.zip | |
MIPS: dts: mscc: describe the PTP register range
This patch adds one register range within the mscc,vsc7514-switch node,
to describe the PTP registers.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: davem@davemloft.net
Cc: richardcochran@gmail.com
Cc: alexandre.belloni@bootlin.com
Cc: UNGLinuxDriver@microchip.com
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: netdev@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: thomas.petazzoni@bootlin.com
Cc: allan.nielsen@microchip.com
Diffstat (limited to 'include/linux/mfd/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions