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| author |   Marek Szyprowski <m.szyprowski@samsung.com> | 2019-05-28 09:38:14 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@armlinux.org.uk> | 2019-06-20 22:29:58 +0100 |
| commit | 5f41f9198f296091c6a58bc2e86af1e9f019b2a3 (patch) | |
| tree | f309f6b56520b0b974c46cff4de32b3d8decc1c1 /include/linux/mfd/git:/ssh:/git@git.zx2c4.com | |
| parent | ARM: 8861/1: errata: Workaround errata A12 857271 / A17 857272 (diff) | |
| download | linux-dev-5f41f9198f296091c6a58bc2e86af1e9f019b2a3.tar.xz linux-dev-5f41f9198f296091c6a58bc2e86af1e9f019b2a3.zip | |
ARM: 8864/1: Add workaround for I-Cache line size mismatch between CPU cores
Some big.LITTLE systems have I-Cache line size mismatch between
LITTLE and big cores. This patch adds a workaround for proper I-Cache
support on such systems. Without it, some class of the userspace code
(typically self-modifying) might suffer from random SIGILL failures.
Similar workaround already exists for ARM64 architecture. I has been
added by commit 116c81f427ff ("arm64: Work around systems with mismatched
cache line sizes").
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'include/linux/mfd/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions