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| author | 2021-12-17 13:49:26 +0100 | |
|---|---|---|
| committer | 2022-01-09 10:11:17 -0800 | |
| commit | 9d7b3078628f591e4007210c0d5d3f94805cff55 (patch) | |
| tree | 4150ad53754820387795d68ddbf33b644ab84309 /include/linux/mfd/git:/ssh:/git@git.zx2c4.com | |
| parent | riscv: dts: microchip: mpfs: Fix PLIC node (diff) | |
| download | linux-dev-9d7b3078628f591e4007210c0d5d3f94805cff55.tar.xz linux-dev-9d7b3078628f591e4007210c0d5d3f94805cff55.zip | |
riscv: dts: microchip: mpfs: Fix reference clock node
"make dtbs_check" reports:
arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: soc: refclk: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[600000000]], 'clock-output-names': ['msspllclk'], 'phandle': [[7]]} should not be valid under {'type': 'object'}
From schema: dtschema/schemas/simple-bus.yaml
Fix this by moving the node out of the "soc" subnode.
While at it, rename it to "msspllclk", and drop the now superfluous
"clock-output-names" property.
Move the actual clock-frequency value to the board DTS, since it is not
set until bitstream programming time.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'include/linux/mfd/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions
