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| author |   Chun-Jie Chen <chun-jie.chen@mediatek.com> | 2021-09-14 10:16:12 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2021-09-14 15:05:37 -0700 |
| commit | cb95c169e95996ea9e63b9e38aa914402cfde7e3 (patch) | |
| tree | e06d42493a3999e6fef4537aa0f862789ec8824d /include/linux/mfd/git:/ssh:/git@git.zx2c4.com | |
| parent | clk: mediatek: Add dt-bindings of MT8195 clocks (diff) | |
| download | linux-dev-cb95c169e95996ea9e63b9e38aa914402cfde7e3.tar.xz linux-dev-cb95c169e95996ea9e63b9e38aa914402cfde7e3.zip | |
clk: mediatek: Fix corner case of tuner_en_reg
On MT8195, tuner_en_reg is moved to register offest 0x0.
If we only judge by tuner_en_reg, it may lead to wrong address.
Add tuner_en_bit to the check condition. And it has been confirmed,
on all the MediaTek SoCs, bit0 of offset 0x0 is always occupied by
clock square control.
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210914021633.26377-4-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/linux/mfd/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions