aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/mfd/git:/ssh:/git@git.zx2c4.com
diff options
context:
space:
mode:
authorMauro Carvalho Chehab <mchehab@kernel.org>2022-07-27 14:29:56 +0200
committerAndi Shyti <andi.shyti@linux.intel.com>2022-07-28 14:02:27 +0200
commitd1051db85f6496ed9c825802bef3709f2e7d816f (patch)
treea327cb5c8ce70d28da6f5a55d097700163b81490 /include/linux/mfd/git:/ssh:/git@git.zx2c4.com
parentdrm/i915/gt: Batch TLB invalidations (diff)
downloadlinux-dev-d1051db85f6496ed9c825802bef3709f2e7d816f.tar.xz
linux-dev-d1051db85f6496ed9c825802bef3709f2e7d816f.zip
drm/i915/gt: describe the new tlb parameter at i915_vma_resource
TLB cache invalidation can happen on two different situations: 1. synchronously, at __vma_put_pages(); 2. asynchronously. On the first case, TLB cache invalidation happens inside __vma_put_pages(). So, no need to do it later on. However, on the second case, the pages will keep in memory until __i915_vma_evict() is called. So, we need to store the TLB data at struct i915_vma_resource, in order to do a TLB cache invalidation before allowing userspace to re-use the same memory. So, i915_vma_resource_unbind() has gained a new parameter in order to store the TLB data at the second case. Document it. Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/aa55eef7e63b8f3d0f69b525db2dd2eb87e9db6b.1658924372.git.mchehab@kernel.org
Diffstat (limited to 'include/linux/mfd/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions