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authorOded Gabbay <ogabbay@advaoptical.com>2013-07-05 12:48:35 -0400
committerChris Ball <cjb@laptop.org>2013-07-05 12:48:35 -0400
commitdcaff04d36fd7f22973bf4fc108912ce19bcef4f (patch)
tree846a58971945a4ecc8683d0e2c8d78510b98523d /include/linux/mmc
parentmmc: esdhc: Add support for 8-bit bus width and non-removable card (diff)
downloadlinux-dev-dcaff04d36fd7f22973bf4fc108912ce19bcef4f.tar.xz
linux-dev-dcaff04d36fd7f22973bf4fc108912ce19bcef4f.zip
mmc: esdhc: Fix bug when writing to SDHCI_HOST_CONTROL register
The P2020 has a non-standard implementation of the SDHCI_HOST_CONTROL register. This patch adds a QUIRK in the SDHCI header to signal that a host controller has a non-standard SDHCI_HOST_CONTROL register. The patch adds a check to the function esdhc_writeb in file sdhci-of-esdhc.c, where it checks if the write is done to the SDHCI_HOST_CONTROL register and th host has the above mentioned QUIRK, then the function simply returns instead of writing to the register. The patch also detects if the processor is P2020 (by looking in dev tree) and if so, adds the QUIRK to the host->quirk2 Signed-off-by: Oded Gabbay <ogabbay@advaoptical.com> Reviewed-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include/linux/mmc')
-rw-r--r--include/linux/mmc/sdhci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index a74518009099..e3c6a74d980a 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -96,6 +96,8 @@ struct sdhci_host {
#define SDHCI_QUIRK2_NO_1_8_V (1<<2)
#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN (1<<3)
#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON (1<<4)
+/* Controller has a non-standard host control register */
+#define SDHCI_QUIRK2_BROKEN_HOST_CONTROL (1<<5)
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */