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authorRichard Weinberger <richard@nod.at>2021-04-15 21:14:51 +0200
committerRichard Weinberger <richard@nod.at>2021-04-15 21:14:51 +0200
commitef4ed780d005d65b1a70ba7803233cace93a73ac (patch)
tree8e30fbe16f3634ee8f2274e5ab5acb27f07edf2d /include/linux/mtd
parentMerge tag 'spi-nor/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next (diff)
parentmtd: rawnand: qcom: Use dma_mapping_error() for error check (diff)
downloadlinux-dev-ef4ed780d005d65b1a70ba7803233cace93a73ac.tar.xz
linux-dev-ef4ed780d005d65b1a70ba7803233cace93a73ac.zip
Merge tag 'nand/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next
MTD core: * Handle possible -EPROBE_DEFER from parse_mtd_partitions() NAND core: * Fix error handling in nand_prog_page_op() (x2) * Add a helper to retrieve the number of ECC bytes per step * Add a helper to retrieve the number of ECC steps * Let ECC engines advertize the exact number of steps * ECC Hamming: - Populate the public nsteps field - Use the public nsteps field * ECC BCH: - Populate the public nsteps field - Use the public nsteps field Raw NAND core: * Add support for secure regions in NAND memory * Try not to use the ECC private structures * Remove duplicate include in rawnand.h * BBT: - Skip bad blocks when searching for the BBT in NAND Raw NAND controller drivers: * Qcom: - Convert bindings to YAML - Use dma_mapping_error() for error check - Add missing nand_cleanup() in error path - Return actual error code instead of -ENODEV - Update last code word register - Add helper to configure location register - Rename parameter name in macro - Add helper to check last code word - Convert nandc to chip in Read/Write helper - Update register macro name for 0x2c offset * GPMI: - Fix a double free in gpmi_nand_init * Rockchip: - Use flexible-array member instead of zero-length array * Atmel: - Update ecc_stats.corrected counter * MXC: - Remove unneeded of_match_ptr() * R852: - replace spin_lock_irqsave by spin_lock in hard IRQ * Brcmnand: - Move to polling in pio mode on oops write - Read/write oob during EDU transfer - Fix OOB R/W with Hamming ECC * FSMC: - Fix error code in fsmc_nand_probe() * OMAP: - Use ECC information from the generic structures SPI-NAND core: * Add missing MODULE_DEVICE_TABLE() SPI-NAND drivers: * gigadevice: Support GD5F1GQ5UExxG
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/nand-ecc-sw-bch.h2
-rw-r--r--include/linux/mtd/nand-ecc-sw-hamming.h2
-rw-r--r--include/linux/mtd/nand.h22
-rw-r--r--include/linux/mtd/rawnand.h14
4 files changed, 36 insertions, 4 deletions
diff --git a/include/linux/mtd/nand-ecc-sw-bch.h b/include/linux/mtd/nand-ecc-sw-bch.h
index 22c92073b3dd..9da9969505a8 100644
--- a/include/linux/mtd/nand-ecc-sw-bch.h
+++ b/include/linux/mtd/nand-ecc-sw-bch.h
@@ -16,7 +16,6 @@
* @req_ctx: Save request context and tweak the original request to fit the
* engine needs
* @code_size: Number of bytes needed to store a code (one code per step)
- * @nsteps: Number of steps
* @calc_buf: Buffer to use when calculating ECC bytes
* @code_buf: Buffer to use when reading (raw) ECC bytes from the chip
* @bch: BCH control structure
@@ -26,7 +25,6 @@
struct nand_ecc_sw_bch_conf {
struct nand_ecc_req_tweak_ctx req_ctx;
unsigned int code_size;
- unsigned int nsteps;
u8 *calc_buf;
u8 *code_buf;
struct bch_control *bch;
diff --git a/include/linux/mtd/nand-ecc-sw-hamming.h b/include/linux/mtd/nand-ecc-sw-hamming.h
index 9f9073d86ff3..c6c71894c575 100644
--- a/include/linux/mtd/nand-ecc-sw-hamming.h
+++ b/include/linux/mtd/nand-ecc-sw-hamming.h
@@ -17,7 +17,6 @@
* @req_ctx: Save request context and tweak the original request to fit the
* engine needs
* @code_size: Number of bytes needed to store a code (one code per step)
- * @nsteps: Number of steps
* @calc_buf: Buffer to use when calculating ECC bytes
* @code_buf: Buffer to use when reading (raw) ECC bytes from the chip
* @sm_order: Smart Media special ordering
@@ -25,7 +24,6 @@
struct nand_ecc_sw_hamming_conf {
struct nand_ecc_req_tweak_ctx req_ctx;
unsigned int code_size;
- unsigned int nsteps;
u8 *calc_buf;
u8 *code_buf;
unsigned int sm_order;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 414f8a4d2853..32fc7edf65b3 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -231,12 +231,14 @@ struct nand_ops {
/**
* struct nand_ecc_context - Context for the ECC engine
* @conf: basic ECC engine parameters
+ * @nsteps: number of ECC steps
* @total: total number of bytes used for storing ECC codes, this is used by
* generic OOB layouts
* @priv: ECC engine driver private data
*/
struct nand_ecc_context {
struct nand_ecc_props conf;
+ unsigned int nsteps;
unsigned int total;
void *priv;
};
@@ -586,6 +588,26 @@ nanddev_get_ecc_conf(struct nand_device *nand)
}
/**
+ * nanddev_get_ecc_nsteps() - Extract the number of ECC steps
+ * @nand: NAND device
+ */
+static inline unsigned int
+nanddev_get_ecc_nsteps(struct nand_device *nand)
+{
+ return nand->ecc.ctx.nsteps;
+}
+
+/**
+ * nanddev_get_ecc_bytes_per_step() - Extract the number of ECC bytes per step
+ * @nand: NAND device
+ */
+static inline unsigned int
+nanddev_get_ecc_bytes_per_step(struct nand_device *nand)
+{
+ return nand->ecc.ctx.total / nand->ecc.ctx.nsteps;
+}
+
+/**
* nanddev_get_ecc_requirements() - Extract the ECC requirements from a NAND
* device
* @nand: NAND device
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 93e8f72beba6..29df2f43dcb5 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1036,6 +1036,16 @@ struct nand_manufacturer {
};
/**
+ * struct nand_secure_region - NAND secure region structure
+ * @offset: Offset of the start of the secure region
+ * @size: Size of the secure region
+ */
+struct nand_secure_region {
+ u64 offset;
+ u64 size;
+};
+
+/**
* struct nand_chip - NAND Private Flash Chip Data
* @base: Inherit from the generic NAND device
* @id: Holds NAND ID
@@ -1085,6 +1095,8 @@ struct nand_manufacturer {
* NAND Controller drivers should not modify this value, but they're
* allowed to read it.
* @read_retries: The number of read retry modes supported
+ * @secure_regions: Structure containing the secure regions info
+ * @nr_secure_regions: Number of secure regions
* @controller: The hardware controller structure which is shared among multiple
* independent devices
* @ecc: The ECC controller structure
@@ -1134,6 +1146,8 @@ struct nand_chip {
unsigned int suspended : 1;
int cur_cs;
int read_retries;
+ struct nand_secure_region *secure_regions;
+ u8 nr_secure_regions;
/* Externals */
struct nand_controller *controller;