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authorMaciej Sosnowski <maciej.sosnowski@intel.com>2008-07-22 17:30:57 -0700
committerDan Williams <dan.j.williams@intel.com>2008-07-22 17:30:57 -0700
commit7f1b358a236ee9c19657a619ac6f2dcabcaa0924 (patch)
tree04eade38d4f8da94d7051f51875ed500b49b4756 /include/linux/pci_ids.h
parentI/OAT: tcp_dma_copybreak default value dependent on I/OAT version (diff)
downloadlinux-dev-7f1b358a236ee9c19657a619ac6f2dcabcaa0924.tar.xz
linux-dev-7f1b358a236ee9c19657a619ac6f2dcabcaa0924.zip
I/OAT: I/OAT version 3.0 support
This patch adds to ioatdma and dca modules support for Intel I/OAT DMA engine ver.3 (aka CB3 device). The main features of I/OAT ver.3 are: * 8 single channel DMA devices (8 channels total) * 8 DCA providers, each can accept 2 requesters * 8-bit TAG values and 32-bit extended APIC IDs Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r--include/linux/pci_ids.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 9b940e644179..06a5b7ae79be 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2363,6 +2363,14 @@
#define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916
#define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG6 0x342b
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG7 0x342c
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG0 0x3430
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG1 0x3431
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG2 0x3432
+#define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433
#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580