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| author |   Matt Roper <matthew.d.roper@intel.com> | 2022-06-10 16:08:01 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-06-14 14:52:13 -0700 |
| commit | 9affc1b87ecba31458567359b5a28b0b08920a24 (patch) | |
| tree | f24ab92895f54fdf92f54330c10be8129930585c /include/linux/phy/git:/ssh:/git@git.zx2c4.com | |
| parent | drm/i915/pvc: Add register steering (diff) | |
| download | linux-dev-9affc1b87ecba31458567359b5a28b0b08920a24.tar.xz linux-dev-9affc1b87ecba31458567359b5a28b0b08920a24.zip | |
drm/i915/pvc: Adjust EU per SS according to HAS_ONE_EU_PER_FUSE_BIT()
If we're treating each bit in the EU fuse register as a single EU
instead of a pair of EUs, then that also cuts the number of potential
EUs per subslice in half.
Fixes: 5ac342ef84d7 ("drm/i915/pvc: Add SSEU changes")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220610230801.459577-1-matthew.d.roper@intel.com
Diffstat (limited to 'include/linux/phy/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions