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| author |   Prashant Malani <pmalani@chromium.org> | 2020-05-28 04:36:03 -0700 |
|---|---|---|
| committer |   Enric Balletbo i Serra <enric.balletbo@collabora.com> | 2020-06-19 19:16:18 +0200 |
| commit | e32b16c31339e37d3cdc814f2773b74c1dbf660c (patch) | |
| tree | 69b9e845ca4bf69c21e331d9ebfc1fbcba02819b /include/linux/platform_data/cros_ec_commands.h | |
| parent | platform/chrome: cros_ec_typec: Register Type C switches (diff) | |
| download | linux-dev-e32b16c31339e37d3cdc814f2773b74c1dbf660c.tar.xz linux-dev-e32b16c31339e37d3cdc814f2773b74c1dbf660c.zip | |
platform/chrome: cros_ec: Update mux state bits
Sync the EC_CMD_USB_PD_MUX_INFO mux state bit fields with the Chrome EC
code base. The newly added bit fields will be used for cros-ec-typec mux
control.
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Diffstat (limited to 'include/linux/platform_data/cros_ec_commands.h')
| -rw-r--r-- | include/linux/platform_data/cros_ec_commands.h | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index 69210881ebac..a7b0fc440c35 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -5207,11 +5207,15 @@ struct ec_params_usb_pd_mux_info { } __ec_align1; /* Flags representing mux state */ -#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ -#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ -#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ -#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ -#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ +#define USB_PD_MUX_NONE 0 /* Open switch */ +#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ +#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ +#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ +#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ +#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ +#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ +#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ +#define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ struct ec_response_usb_pd_mux_info { uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ |