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authorLinus Torvalds <torvalds@linux-foundation.org>2020-08-11 17:28:32 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2020-08-11 17:28:32 -0700
commitfb893de323e2d39f7a1f6df425703a2edbdf56ea (patch)
tree213f4c1e722a878364e2a31b314dc55a1607f018 /include/linux/platform_data/cros_ec_commands.h
parentMerge tag 'for-linus-5.9-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux (diff)
parentplatform/chrome: cros_ec_proto: check for missing EC_CMD_HOST_EVENT_GET_WAKE_MASK (diff)
downloadlinux-dev-fb893de323e2d39f7a1f6df425703a2edbdf56ea.tar.xz
linux-dev-fb893de323e2d39f7a1f6df425703a2edbdf56ea.zip
Merge tag 'tag-chrome-platform-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux
Pull chrome platform updates from Benson Leung: "cros_ec_typec: - Add support for switch control and alternate modes to the Chrome EC Type C port driver - Add basic suspend/resume support sensorhub: - Fix timestamp overflow issue - Fix legacy timestamp spreading on Nami systems cros_ec_proto: - After removing all users of, stop exporting cros_ec_cmd_xfer - Check for missing EC_CMD_HOST_EVENT_GET_WAKE_MASK and ignore wakeups on old ECs misc: - Documentation warning cleanup - Fix double unlock issue in ishtp" * tag 'tag-chrome-platform-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux: (21 commits) platform/chrome: cros_ec_proto: check for missing EC_CMD_HOST_EVENT_GET_WAKE_MASK platform/chrome: cros_ec_proto: ignore unnecessary wakeups on old ECs platform/chrome: cros_ec_sensorhub: Simplify legacy timestamp spreading platform/chrome: cros_ec_proto: Do not export cros_ec_cmd_xfer() platform/chrome: cros_ec_typec: Unregister partner on error platform/chrome: cros_ec_sensorhub: Fix EC timestamp overflow platform/chrome: cros_ec_typec: Add PM support platform/chrome: cros_ec_typec: Use workqueue for port update platform/chrome: cros_ec_typec: Add a dependency on USB_ROLE_SWITCH platform/chrome: cros_ec_ishtp: Fix a double-unlock issue platform/chrome: cros_ec_rpmsg: Document missing struct parameters platform/chrome: cros_ec_spi: Document missing function parameters platform/chrome: cros_ec_typec: Add TBT compat support platform/chrome: cros_ec: Add TBT pd_ctrl fields platform/chrome: cros_ec_typec: Make configure_mux static platform/chrome: cros_ec_typec: Support DP alt mode platform/chrome: cros_ec_typec: Add USB mux control platform/chrome: cros_ec_typec: Register PD CTRL cmd v2 platform/chrome: cros_ec: Update mux state bits platform/chrome: cros_ec_typec: Register Type C switches ...
Diffstat (limited to 'include/linux/platform_data/cros_ec_commands.h')
-rw-r--r--include/linux/platform_data/cros_ec_commands.h33
1 files changed, 24 insertions, 9 deletions
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index 91e77f53414d..1fcfe9e63cb9 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -4917,15 +4917,26 @@ struct ec_response_usb_pd_control_v1 {
#define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */
#define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */
+/* Active/Passive Cable */
+#define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
+/* Optical/Non-optical cable */
+#define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
+/* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
+#define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
+/* Active Link Uni-Direction */
+#define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
+
struct ec_response_usb_pd_control_v2 {
uint8_t enabled;
uint8_t role;
uint8_t polarity;
char state[32];
- uint8_t cc_state; /* USBC_PD_CC_*Encoded cc state */
- uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
- /* CL:1500994 Current cable type */
- uint8_t reserved_cable_type;
+ uint8_t cc_state; /* enum pd_cc_states representing cc state */
+ uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
+ uint8_t reserved; /* Reserved for future use */
+ uint8_t control_flags; /* USB_PD_CTRL_*flags */
+ uint8_t cable_speed; /* TBT_SS_* cable speed */
+ uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */
} __ec_align1;
#define EC_CMD_USB_PD_PORTS 0x0102
@@ -5207,11 +5218,15 @@ struct ec_params_usb_pd_mux_info {
} __ec_align1;
/* Flags representing mux state */
-#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
-#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
-#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
-#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
-#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
+#define USB_PD_MUX_NONE 0 /* Open switch */
+#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
+#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
+#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
+#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
+#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
+#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
+#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
+#define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */
struct ec_response_usb_pd_mux_info {
uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */