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authorAlexander Shiyan <shc_work@mail.ru>2013-12-15 13:36:51 +0400
committerMark Brown <broonie@linaro.org>2013-12-16 20:50:13 +0000
commitd3233433356aa1965b60b08ee61465b20e50474b (patch)
treecd693a91f65f5c2aa937047459fd6f3d49fcd719 /include/linux/regmap.h
parentLinux 3.13-rc4 (diff)
downloadlinux-dev-d3233433356aa1965b60b08ee61465b20e50474b.tar.xz
linux-dev-d3233433356aa1965b60b08ee61465b20e50474b.zip
regmap: irq: Allow using zero value for ack_base
In some cases, clear interrupt register may be at address 0. This patch allows to use such configurations by adding additional configuration bit to indicate this. [With doc fix from Levente Kurusa <levex@linux.com> -- broonie] Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'include/linux/regmap.h')
-rw-r--r--include/linux/regmap.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index e55907804d39..c9e5fb197eb6 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -497,11 +497,13 @@ struct regmap_irq {
*
* @status_base: Base status register address.
* @mask_base: Base mask register address.
- * @ack_base: Base ack address. If zero then the chip is clear on read.
+ * @ack_base: Base ack address. If zero then the chip is clear on read.
+ * Using zero value is possible with @use_ack bit.
* @wake_base: Base address for wake enables. If zero unsupported.
* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
* @init_ack_masked: Ack all masked interrupts once during initalization.
* @mask_invert: Inverted mask register: cleared bits are masked out.
+ * @use_ack: Use @ack register even if it is zero.
* @wake_invert: Inverted wake register: cleared bits are wake enabled.
* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
*
@@ -520,6 +522,7 @@ struct regmap_irq_chip {
unsigned int irq_reg_stride;
bool init_ack_masked:1;
bool mask_invert:1;
+ bool use_ack:1;
bool wake_invert:1;
bool runtime_pm:1;