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| author | 2017-07-25 13:34:06 +0300 | |
|---|---|---|
| committer | 2017-08-23 15:59:15 -0700 | |
| commit | bc7b34a2fb78661b2980d949aad8edc39c253e3a (patch) | |
| tree | a518f04fca7e3146d3ba85d0f49550cb737155b1 /include/linux/timerqueue.h | |
| parent | clk: tegra210: remove non-existing VFIR clock (diff) | |
clk: tegra: Init cfg structure in _get_pll_mnp
Not all fields are read from the hw depending on the PLL type. Make sure
the other fields are 0 by clearing the structure beforehand to prevent
users such as the rate re-calculation code from using bogus values.
Based on work by Alex Frid <afrid@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions
