diff options
| author |   Bill Huang <bilhuang@nvidia.com> | 2015-06-18 17:28:35 -0400 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2015-12-17 13:37:55 +0100 |
| commit | 139fd30943c3c8ed76d0ce08ff711cfff3b118ec (patch) | |
| tree | e5d3d9bec2145062c1ad25c44f50d21ab95737bb /include/linux | |
| parent | clk: tegra: pll: Add logic for SS (diff) | |
clk: tegra: Add Super Gen5 Logic
Super clock divider control and clock source mux of Tegra210 has changed
a little against prior SoCs, this patch adds Gen5 logic to address those
differences.
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions