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| author |   Stephane Eranian <eranian@google.com> | 2020-10-01 06:57:49 -0700 |
|---|---|---|
| committer |   Peter Zijlstra <peterz@infradead.org> | 2020-10-29 11:00:39 +0100 |
| commit | 995f088efebe1eba0282a6ffa12411b37f8990c2 (patch) | |
| tree | 9e3185b05657e50aa991790dde6d74ba4dd8ee02 /include/linux | |
| parent | powerpc/perf: Support PERF_SAMPLE_DATA_PAGE_SIZE (diff) | |
| download | linux-dev-995f088efebe1eba0282a6ffa12411b37f8990c2.tar.xz linux-dev-995f088efebe1eba0282a6ffa12411b37f8990c2.zip | |
perf/core: Add support for PERF_SAMPLE_CODE_PAGE_SIZE
When studying code layout, it is useful to capture the page size of the
sampled code address.
Add a new sample type for code page size.
The new sample type requires collecting the ip. The code page size can
be calculated from the NMI-safe perf_get_page_size().
For large PEBS, it's very unlikely that the mapping is gone for the
earlier PEBS records. Enable the feature for the large PEBS. The worst
case is that page-size '0' is returned.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201001135749.2804-5-kan.liang@linux.intel.com
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/perf_event.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 7e3785dd27d9..e533b03af053 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1035,6 +1035,7 @@ struct perf_sample_data { u64 phys_addr; u64 cgroup; u64 data_page_size; + u64 code_page_size; } ____cacheline_aligned; /* default value for data source */ |