aboutsummaryrefslogtreecommitdiffstats
path: root/include/net/dsa.h
diff options
context:
space:
mode:
authorVladimir Oltean <vladimir.oltean@nxp.com>2021-10-22 21:43:08 +0300
committerDavid S. Miller <davem@davemloft.net>2021-10-24 13:47:44 +0100
commit49753a75b9a32de4c0393bb8d1e51ea223fda8e4 (patch)
treebe8a8628faea239788f25e13da18bba606187319 /include/net/dsa.h
parentnet: dsa: b53: serialize access to the ARL table (diff)
downloadlinux-dev-49753a75b9a32de4c0393bb8d1e51ea223fda8e4.tar.xz
linux-dev-49753a75b9a32de4c0393bb8d1e51ea223fda8e4.zip
net: dsa: lantiq_gswip: serialize access to the PCE table
Looking at the code, the GSWIP switch appears to hold bridging service structures (VLANs, FDBs, forwarding rules) in PCE table entries. Hardware access to the PCE table is non-atomic, and is comprised of several register reads and writes. These accesses are currently serialized by the rtnl_lock, but DSA is changing its driver API and that lock will no longer be held when calling ->port_fdb_add() and ->port_fdb_del(). So this driver needs to serialize the access to the PCE table using its own locking scheme. This patch adds that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/net/dsa.h')
0 files changed, 0 insertions, 0 deletions