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| author |   Hai Nguyen Pham <hai.pham.ud@renesas.com> | 2019-09-04 14:08:02 +0200 |
|---|---|---|
| committer |   Joerg Roedel <jroedel@suse.de> | 2019-09-05 13:03:34 +0200 |
| commit | 3623002f0f761efd7eb38cfa5af1d2319365a8fd (patch) | |
| tree | d2caed8827d6db6549ce330227c7b014c993c40f /include/soc | |
| parent | iommu/ipmmu-vmsa: Move IMTTBCR_SL0_TWOBIT_* to restore sort order (diff) | |
| download | linux-dev-3623002f0f761efd7eb38cfa5af1d2319365a8fd.tar.xz linux-dev-3623002f0f761efd7eb38cfa5af1d2319365a8fd.zip | |
iommu/ipmmu-vmsa: Disable cache snoop transactions on R-Car Gen3
According to the Hardware Manual Errata for Rev. 1.50 of April 10, 2019,
cache snoop transactions for page table walk requests are not supported
on R-Car Gen3.
Hence, this patch removes setting these fields in the IMTTBCR register,
since it will have no effect, and adds comments to the register bit
definitions, to make it clear they apply to R-Car Gen2 only.
Signed-off-by: Hai Nguyen Pham <hai.pham.ud@renesas.com>
[geert: Reword, add comments]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/soc')
0 files changed, 0 insertions, 0 deletions