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| author |   Dmitry Osipenko <digetx@gmail.com> | 2018-12-12 23:38:51 +0300 |
|---|---|---|
| committer |   Joerg Roedel <jroedel@suse.de> | 2019-01-16 13:54:11 +0100 |
| commit | be4dbdec2bab8635c7a41573668624ee13d83022 (patch) | |
| tree | 00def41c03d2cfd702db1ead0366ad8f0a083c0c /include/soc | |
| parent | ARM: dts: tegra20: Update Memory Controller node to the new binding (diff) | |
| download | linux-dev-be4dbdec2bab8635c7a41573668624ee13d83022.tar.xz linux-dev-be4dbdec2bab8635c7a41573668624ee13d83022.zip | |
memory: tegra: Don't invoke Tegra30+ specific memory timing setup on Tegra20
This fixes irrelevant "tegra-mc 7000f000.memory-controller: no memory
timings for RAM code 0 registered" warning message during of kernels
boot-up on Tegra20.
Fixes: a8d502fd3348 ("memory: tegra: Squash tegra20-mc into common tegra-mc driver")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/soc')
0 files changed, 0 insertions, 0 deletions