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| author |   Yong Zhao <yong.zhao@amd.com> | 2018-05-14 12:15:27 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2018-05-15 13:44:26 -0500 |
| commit | 959a2091fae0fa498c79e095a4f6cbbb202a1194 (patch) | |
| tree | c2a0cc72945fbe32972378ea5981932817cacd1f /include/uapi/drm/amdgpu_drm.h | |
| parent | drm/amd/powerplay: Add notify PWE function to SMU10 (diff) | |
| download | linux-dev-959a2091fae0fa498c79e095a4f6cbbb202a1194.tar.xz linux-dev-959a2091fae0fa498c79e095a4f6cbbb202a1194.zip | |
drm/amdgpu: Add support to change mtype for 2nd part of gart BOs on GFX9
This change prepares for a workaround in amdkfd for a GFX9 HW bug. It
requires the control stack memory of compute queues, which is allocated
from the second page of MQD gart BOs, to have mtype NC, rather than
the default UC.
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi/drm/amdgpu_drm.h')
| -rw-r--r-- | include/uapi/drm/amdgpu_drm.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 081d25640b64..78b4dd89fcb4 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -101,6 +101,10 @@ extern "C" { #define AMDGPU_GEM_CREATE_VM_ALWAYS_VALID (1 << 6) /* Flag that BO sharing will be explicitly synchronized */ #define AMDGPU_GEM_CREATE_EXPLICIT_SYNC (1 << 7) +/* Flag that indicates allocating MQD gart on GFX9, where the mtype + * for the second page onward should be set to NC. + */ +#define AMDGPU_GEM_CREATE_MQD_GFX9 (1 << 8) struct drm_amdgpu_gem_create_in { /** the requested memory size */ |