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| author |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2016-02-12 14:24:37 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2016-02-12 14:24:37 +0100 |
| commit | 05fd934ba585ea8c9f129f15f11327adb1f96fe3 (patch) | |
| tree | 7b678c512c43419ccf484e71c84d69caee84a6da /include/uapi/drm | |
| parent | agp/intel-gtt: Only register fake agp driver for gen1 (diff) | |
| parent | drm/msm: remove unused variable (diff) | |
| download | linux-dev-05fd934ba585ea8c9f129f15f11327adb1f96fe3.tar.xz linux-dev-05fd934ba585ea8c9f129f15f11327adb1f96fe3.zip | |
Merge tag 'topic/drm-misc-2016-02-12' into drm-intel-next-queued
Backmerge to get at the new encoder_mask support in atomic helpers.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'include/uapi/drm')
| -rw-r--r-- | include/uapi/drm/drm.h | 1 | ||||
| -rw-r--r-- | include/uapi/drm/drm_fourcc.h | 2 | ||||
| -rw-r--r-- | include/uapi/drm/etnaviv_drm.h | 3 |
3 files changed, 5 insertions, 1 deletions
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index b4e92eb12044..a0ebfe7c9a28 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -669,6 +669,7 @@ struct drm_set_client_cap { __u64 value; }; +#define DRM_RDWR O_RDWR #define DRM_CLOEXEC O_CLOEXEC struct drm_prime_handle { __u32 handle; diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 998bd253faad..4d8da699a623 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -225,7 +225,7 @@ * - multiple of 128 pixels for the width * - multiple of 32 pixels for the height * - * For more information: see http://linuxtv.org/downloads/v4l-dvb-apis/re32.html + * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html */ #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1) diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h index 4cc989ad6851..f95e1c43c3fb 100644 --- a/include/uapi/drm/etnaviv_drm.h +++ b/include/uapi/drm/etnaviv_drm.h @@ -48,6 +48,8 @@ struct drm_etnaviv_timespec { #define ETNAVIV_PARAM_GPU_FEATURES_2 0x05 #define ETNAVIV_PARAM_GPU_FEATURES_3 0x06 #define ETNAVIV_PARAM_GPU_FEATURES_4 0x07 +#define ETNAVIV_PARAM_GPU_FEATURES_5 0x08 +#define ETNAVIV_PARAM_GPU_FEATURES_6 0x09 #define ETNAVIV_PARAM_GPU_STREAM_COUNT 0x10 #define ETNAVIV_PARAM_GPU_REGISTER_MAX 0x11 @@ -59,6 +61,7 @@ struct drm_etnaviv_timespec { #define ETNAVIV_PARAM_GPU_BUFFER_SIZE 0x17 #define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT 0x18 #define ETNAVIV_PARAM_GPU_NUM_CONSTANTS 0x19 +#define ETNAVIV_PARAM_GPU_NUM_VARYINGS 0x1a #define ETNA_MAX_PIPES 4 |