diff options
| author |   Anusha Srivatsa <anusha.srivatsa@intel.com> | 2018-11-01 14:42:16 -0700 |
|---|---|---|
| committer |   Manasi Navare <manasi.d.navare@intel.com> | 2018-11-01 22:00:04 -0700 |
| commit | 18cde299df33ff73908f7e5dcebf321fb79ed36c (patch) | |
| tree | 7177765891ecdff7af76e26651c2f7b632dca504 /include/uapi/drm | |
| parent | drm/i915/icl+: Sanitize port to PLL mapping (diff) | |
| download | linux-dev-18cde299df33ff73908f7e5dcebf321fb79ed36c.tar.xz linux-dev-18cde299df33ff73908f7e5dcebf321fb79ed36c.zip | |
drm/i915/icl: Fix DSS_CTL register names
This patch fixes the naming of the registers:
s/PIPE_DSS_CTL/ICL_PIPE_DSS_CTL
And also fix the hex values to lower case, to match
rest of the definitions.
Manasi noticed this with the patch that was merged.
v2: fix "Fixes" tag.
Fixes: 8b1b558d690a ("drm/i915/icl: Add DSS_CTL Registers")
Suggested-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101214216.8958-1-anusha.srivatsa@intel.com
Diffstat (limited to 'include/uapi/drm')
0 files changed, 0 insertions, 0 deletions