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authorHawking Zhang <Hawking.Zhang@amd.com>2018-06-12 18:30:04 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-06-21 18:58:21 -0500
commit22e96fa62ec66ca9d21a76b74601fc200908fec3 (patch)
tree060547b3fa0123c1ca8a36379c6dcdcdbf7fe395 /include/uapi/drm
parentdrm/amdgpu: disable concurrent flushes for Navi10 v2 (diff)
downloadlinux-dev-22e96fa62ec66ca9d21a76b74601fc200908fec3.tar.xz
linux-dev-22e96fa62ec66ca9d21a76b74601fc200908fec3.zip
drm/amdgpu: add pa_sc_tile_steering_override to drm_amdgpu_info_device
the initial/default value of pa_sc_tile_steering_override need to be exposed to user mode driver Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi/drm')
-rw-r--r--include/uapi/drm/amdgpu_drm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index e1e5e7860570..d799858b9e53 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -992,6 +992,8 @@ struct drm_amdgpu_info_device {
__u64 high_va_offset;
/** The maximum high virtual address */
__u64 high_va_max;
+ /* gfx10 pa_sc_tile_steering_override */
+ __u32 pa_sc_tile_steering_override;
};
struct drm_amdgpu_info_hw_ip {