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authorKen Wang <Qingqing.Wang@amd.com>2015-06-03 17:47:54 +0800
committerAlex Deucher <alexander.deucher@amd.com>2015-06-03 21:04:02 -0400
commita101a8995ab8072125d0bb4d95425c9fb37ff809 (patch)
treedb745acda68a5b1d9f7c3f7207e72291659b5b7a /include/uapi/drm
parentdrm/amdgpu add max_memory_clock for interface query (v2) (diff)
downloadlinux-dev-a101a8995ab8072125d0bb4d95425c9fb37ff809.tar.xz
linux-dev-a101a8995ab8072125d0bb4d95425c9fb37ff809.zip
drm/amdgpu add ce_ram_size for interface query
Add a query for the CE ram size. User mode drivers will want to use this to determine how much size of the cache on the CE. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
Diffstat (limited to 'include/uapi/drm')
-rw-r--r--include/uapi/drm/amdgpu_drm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 420c762f2ed7..e24cc2e318df 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -573,6 +573,8 @@ struct drm_amdgpu_info_device {
/** Page table entry - fragment size */
uint32_t pte_fragment_size;
uint32_t gart_page_size;
+ /** constant engine ram size*/
+ uint32_t ce_ram_size;
};
struct drm_amdgpu_info_hw_ip {