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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2022-04-30 12:41:53 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-05 12:10:21 +0200 |
| commit | 359f10c1b02d3c65c7eba6146e5b7962f0abbd93 (patch) | |
| tree | 3f759078febf6f33f94c1ab687d7d6b1a3b954ab /include/uapi/linux/can/git:/ssh:/git@git.zx2c4.com | |
| parent | clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support (diff) | |
| download | linux-dev-359f10c1b02d3c65c7eba6146e5b7962f0abbd93.tar.xz linux-dev-359f10c1b02d3c65c7eba6146e5b7962f0abbd93.zip | |
clk: renesas: r9a07g044: Add M3 Clock support
Add support for M3 clock which is sourced from DSI divider connected
to PLL5_4 mux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220430114156.6260-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include/uapi/linux/can/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions