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authorAdrian Hunter <adrian.hunter@intel.com>2021-09-07 19:39:01 +0300
committerPeter Zijlstra <peterz@infradead.org>2021-10-15 11:25:31 +0200
commit8b8ff8cc3b8155c18162e8b1f70e1230db176862 (patch)
tree7fa6284dbe477808c4a93170cfb6ea7ac5463980 /include/uapi/linux/perf_event.h
parentperf/x86: Add compiler barrier after updating BTS (diff)
downloadlinux-dev-8b8ff8cc3b8155c18162e8b1f70e1230db176862.tar.xz
linux-dev-8b8ff8cc3b8155c18162e8b1f70e1230db176862.zip
perf/x86: Add new event for AUX output counter index
PEBS-via-PT records contain a mask of applicable counters. To identify which event belongs to which counter, a side-band event is needed. Until now, there has been no side-band event, and consequently users were limited to using a single event. Add such a side-band event. Note the event is optimised to output only when the counter index changes for an event. That works only so long as all PEBS-via-PT events are scheduled together, which they are for a recording session because they are in a single group. Also no attribute bit is used to select the new event, so a new kernel is not compatible with older perf tools. The assumption being that PEBS-via-PT is sufficiently esoteric that users will not be troubled by this. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20210907163903.11820-2-adrian.hunter@intel.com
Diffstat (limited to 'include/uapi/linux/perf_event.h')
-rw-r--r--include/uapi/linux/perf_event.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index f92880a15645..c89535de1ec8 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -1141,6 +1141,21 @@ enum perf_event_type {
*/
PERF_RECORD_TEXT_POKE = 20,
+ /*
+ * Data written to the AUX area by hardware due to aux_output, may need
+ * to be matched to the event by an architecture-specific hardware ID.
+ * This records the hardware ID, but requires sample_id to provide the
+ * event ID. e.g. Intel PT uses this record to disambiguate PEBS-via-PT
+ * records from multiple events.
+ *
+ * struct {
+ * struct perf_event_header header;
+ * u64 hw_id;
+ * struct sample_id sample_id;
+ * };
+ */
+ PERF_RECORD_AUX_OUTPUT_HW_ID = 21,
+
PERF_RECORD_MAX, /* non-ABI */
};